UVMLint

UVM is THE most adopted verification methodology in the semiconductor design industry. Given the long history of UVM, several styles of writing code have evolved over the last decade. Adding to it, the global workforce developing and reusing UVM code base calls for customize-able lint checkers the need of the hour for UVM - hence we present to you, UVMLint, a fully customizable, Python-based linter built on top of our opensource PySlint. With 140+ rules already available to deploy, UVMLint is here today and is available under SaaS model with no recurring license costs (unlike a traditional EDA tool). You own the rules, AsFigo does the initial implementation and you benefit forever! Contact us today to build your own UVMLint. UVMLint@AsFigo.com

DVCon US'24 update - Get your UVM Testbenches linted for free! Submit your TB repo today: http://tinyurl.com/UVMLint

PySlint

Python-based SystemVerilog Linter that is focused on class-based testbenches, UVM, DPI, SVA, and more. The best part of PySlint is the use model. The approach of being able to add new rules using the simplicity of Python and a robust API based on open-source slang & pyslang makes PySlint the most powerful platform to develop custom verification apps.

MathLib - Mathematical models in chip design

Mathematical equations are omnipresent in modern-day chip designs. Few examples:

  • Artificial Intelligence and Machine Learning chips

  • Autonomous driving hardware leverages deep mathematical equations to predict the next move of the vehicle!

  • AMS (Ananlog and Mixed Signal) systems use precise equations to model the behavior of PLLs, VCOs, LDOs, Power Gain Amplifiers, etc.

  • Low-power control circuits are often controlled through a PVT sensor whose operations involve stochastic and statistical models.

  • Biomedical systems and wearable devices utilize complex equations to predict and alert users about lifestyle changes

A Common element in all these systems from a hardware chip design and verification perspective is the underlying mathematical equations. System designers and architects often use higher-level models using tools such as MATLAB (c), GNU Octave, etc.

MathLib is a flagship product from AsFigo that provides an easy-to-use library of common mathematical functions in native languages such as:

  • SystemVerilog

  • VHDL

  • C++/SystemC

  • E (IEEE 1647/Specman)

AsFigo